Journal: Volume 30, No. 2, 2025
Pages: 10 – 21
DOI: https://doi.org/10.62660/bcstu/2.2025.22
1,032 Views

Hardware implementation of the HDG hash function

Volodymyr Luzhetskyi, Vitalii Seleznov
Received 08.01.2025
Revised 19.05.2025
Accepted 16.06.2025

Abstract

Given the increasing role of the Internet of Things and related low-resource devices, research into hash functions that provide a high level of cryptographic strength with minimal hardware costs is relevant. The aim of the study was to propose a hardware implementation of a new HDG hash function designed for use in small devices in the form of a specialised processor in order to reduce the hardware costs of implementation. The research methods included structural design of each functional block, digital modelling in the Logisim-evolution environment, and synthesis on an ASIC platform using 0.18 µm technology with the standard UMCL18G212T3 library, as well as calculation of hardware complexity in Gate Equivalents. HDG meets the requirements of low-resource cryptography thanks to its byte-oriented architecture, which allows data processing at the level of individual bytes, ensuring high efficiency with limited memory resources and computing capabilities of devices. The structure of a specialised processor for hashing was presented. The HDG specialised processor is decomposed into four functional blocks, each of which implements a corresponding function: a register block for storing intermediate hash values; a shift register with linear feedback, which provides the generation of a pseudorandom sequence; a block for addition modulo 256 and a control block. The simulation results confirmed the correctness of the structure of the specialised processor and the interaction of its components. The calculated complexity of the HDG processor hardware implementation is 1,683 GE for calculating a 256-bit hash value, which meets the requirements of the international standard ISO/IEC FDIS 29192 for low-resource cryptography. A comparison with hardware implementations of wellknown low-resource hash functions PHOTON, SPONGENT, S-Quark, GLUON, and HVH showed a reduction in hardware costs of 15% or more. In some cases, the HDG processor demonstrated lower implementation complexity for 256-bit hash values values of 256 bits compared to hash functions that provide calculations of hash values of 224 or 160 bits, which indicates the effectiveness of the developed structure and the feasibility of using such a specialised processor for devices with limited hardware resources

Keywords

References

  1. Aumasson, J.P., Henzen, L., Meier, W., & Naya-Plasencia, M. (2010). QUARK: A lightweight hash. In S. Mangard & F.-X. Standaert (Eds.), Cryptographic hardware and embedded systems – CHES 2010 (pp. 1-15). Cham: Springer. doi: 10.1007/978-3-642-15031-9_1.
  2. Bogdanov, A., Knezevic, M., Leander, G., Toz, D., Varici, K., & Verbauwhede, I. (2013). SPONGENT: The design space of lightweight cryptographic hashing. IEEE Transactions on Computers, 62(10), 2041-2053. doi: 10.1109/TC.2012.196.
  3. Buchanan, W.J., Li, S., & Asif, R. (2017). Lightweight cryptography methods. Journal of Cyber Security Technology, 1(3-4), 187-201. doi: 10.1080/23742917.2017.1384917.
  4. Damgård, I. (1989). A design principle for hash functions. Lecture Notes in Computer Science, 435, 416-427. doi: 10.1007/0-387-34805-0_39.
  5. El Gaabouri, I., Senhadji, M., & Belkasmi, M. (2022). A survey on lightweight cryptography approach for IoT devices security. In 2022 5th international conference on networking, information systems and security: Envisage intelligent systems in  5g//6G-based interconnected digital worlds (NISS) (pp. 1-8). Bandung: IEEE. doi: 10.1109/NISS55057.2022.10085144.
  6. Guo, J., Peyrin, T., & Poschmann, A. (2011). The PHOTON family of lightweight hash functions. Retrieved from https://eprint. iacr.org/2011/609.
  7. Gupta, D.N., & Kumar, R. (2021). Sponge based lightweight cryptographic hash functions for IoT applications. In 2021 international conference on intelligent technologies (CONIT) (pp. 1-5). Hubli: IEEE. doi: 10.1109/conit51480.2021.9498572.
  8. Gupta, D.N., & Kumar, R. (2023). DeeR-Hash: A lightweight hash construction for Industry 4.0 / IoT. Journal of Scientific & Industrial Research, 82(1), 142-150. doi: 10.56042/jsir.v82i1.69938.
  9. Harris, S.L., & Harris, D. (2021). Digital design and RISC-V computer architecture textbook. In 2021 ACM/IEEE workshop on computer architecture education (WCAE) (pp. 1-5). Raleigh: IEEE. doi: 10.1109/wcae53984.2021.9707615.
  10. Huang, Y., Li, S., Sun, W., Dai, X., & Zhu, W. (2021). HVH: A lightweight hash function based on dual pseudo-random transformation. In Security, privacy, and anonymity in computation, communication, and storage (pp. 492-505). Cham: Springer. doi: 10.1007/978-3-030-68884-4_41.
  11. ISO/IEC 29192-1:2012. (2012). Information technology – security techniques – lightweight cryptography – Part 1: General. Retrieved from https://www.iso.org/standard/56425.html.
  12. ISO/IEC 29192-5:2016. (2016). Information technology – security techniques – lightweight cryptography – Part 5: Hash-functions. Retrieved from https://www.iso.org/standard/67173.html.
  13. Khan, S., Lee, W.-K., Karmakar, A., Mera, J.M.B., Majeed, A., & Hwang, S.O. (2023). Area-time efficient implementation of NIST lightweight hash functions targeting IoT applications. IEEE Internet of Things Journal, 10(9), 8083-8095. doi: 10.1109/ jiot.2022.3229516.
  14. Lawhale, P.R., Kale, S.N., Kasturiwale, H., & Thakare, Y.N. (2025). FPGA implementation of compact architecture for lightweight hash algorithm for resource constrained devices. Communications on Applied Nonlinear Analysis, 32(2), 679-691. doi: 10.52783/cana.v32.1861.
  15. Logisim-evolution. (n.d.). Digital logic design tool and simulator. Retrieved from https://surl.li/pjzuiy.
  16. Manifavas, C., Hatzivasilis, G., Fysarakis, K., & Rantos, K. (2014). Lightweight cryptography for embedded systems – a comparative analysis. In Data privacy management and autonomous spontaneous security (pp. 333-349). Berlin: Springer. doi: 10.1007/978-3-642-54568-9_21.
  17. Martin, H., Lopez, P.P., San Millan, E., & Tapiador, J.E. (2017). A lightweight implementation of the Tav-128 hash function. IEICE Electronics Express, 14(11), article number 20161255. doi: 10.1587/elex.14.20161255.
  18. Merkle, R.C. (1990). One way hash functions and DES. Lecture Notes in Computer Science, 435, 428-446. doi: 10.1007/0-387-34805-0_40.
  19. Mukundan, P.M., Manayankath, S., Srinivasan, C., & Sethumadhavan, M. (2016). Hash-One: A lightweight cryptographic hash function. IET Information Security, 10(5), 242-252. doi: 10.1049/iet-ifs.2015.0385.
  20. Seleznov, V.I. (2023). Analysis of low-resource hashing methods. In LII scientific and technical conference of VNTU departments: Proceedings of the scientific conference (pp. 21-23). Vinnytsia: Vinnytsia National Technical University.
  21. Seleznov, V.I., & Luzhetskyi, V.A. (2023). Low-resource hashing method of the “data – generator” typeCybersecurity: Education, Science, Technique, 28, 84-95.
  22. Virtual Silicon Inc. (2004). 0.18 μm VIP standard cell library tape out ready (part number: UMCL18G212T3). Process: UMC logic 0.18 μm generic II technology. Retrieved from https://www.eetimes.com/virtual-silicon-ships0-18-micron-libraries/.
  23. Ward, R., & Molteno, T.C.A. (2012). Table of linear feedback shift registers. Otago: University of Otago.
  24. Widhiara, B., Kurniawan, Y., & Susanti, B.H. (2023). RM70: A lightweight hash function. IAENG International Journal of Applied Mathematics, 53(1), 94-102.
  25. Windarta, S., Suryadi, Ramli, K., Pranggono, B., & Gunawan, T.S. (2022). Lightweight cryptographic hash functions: Design trends, comparative study, and future directions. IEEE Access, 10, 82272-82294. doi: 10.1109/access.2022.3195572.
  26. Windarta, S., Suryadi, S., Ramli, K., Lestari, A.A., Wildan, W., Pranggono, B., & Wardhani, R.W. (2023). Two new lightweight cryptographic hash functions based on saturnin and beetle for the Internet of Things. IEEE Access, 11, 84074-84090. doi: 10.1109/access.2023.3301128.

Suggested citation

Luzhetskyi, V., & Seleznov, V. (2025). Hardware implementation of the HDG hash function. Bulletin of Cherkasy State Technological University, 30(2), 10-21. https://doi.org/10.62660/bcstu/2.2025.22